label: circuit board land,printed-circuit board,PCB
Land, surface-mount assembly of basic building blocks, used to construct the circuit board pad pattern (land pattern), that is a combination of various pads designed for specific component types. No more than a bad pad structure design more frustrating thing. When an incorrect pad design, it is difficult and sometimes impossible to achieve the desired weld. There are two words in English pads: Land and Pad, can often be used interchangeably; however, functionally, Land is a two-dimensional surface features, surface mount components can be used, while Pad is a three-dimensional features, can be used component plug-ins. As a general rule, Land excluding plated through hole (PTH, plated through-hole). The bypass hole (via) connected to a different circuit layer is plated through hole (PTH). Bypass blind hole (blind via) connected to the outer layer and an inner layer or more, and buried vias to connect the inner layer only.
As previously noted, typically do not include pads Land plated through hole (PTH). Land pads in a PTH take a considerable amount of solder in the soldering process, insufficient solder joints produced in many cases. However, in some cases, the force element is changed to the wiring density of this rule, the most noteworthy is the chip scale package (CSP, chip scale package). In 1.0mm (0.0394 ") pitch less difficult wiring through a wire pad." Generated maze " blind bypass hole in the pad and mini bypass hole (microvia), allowing direct wiring to another level because these small bypass holes and blind, so they will not suck too much solder, solder joint results of a small amount of tin or no effect.
There are many industrial literature for IPC (Association Connecting Electronics Industries), EIA (Electronic Industry Alliance) and JEDEC (Solid State Technology Association), in the design of the structure should be used when the pad. The main file is the IPC-SM-782 " Surface Mount Design and pad construction standards," which provides information on the pad surface mount components for the structure. When J-STD-001 " welding electrical and electronic assembly requirements " and IPC-A-610 " Acceptability electronic assemblies " as the weld process standards, pad structure should be in line with IPC-SM-782 's intent. If the pad is greatly deviated from IPC-SM-782, it will be very difficult to achieve compliance with J-STD-001 and IPC-A-610 solder joints.
Elements of knowledge (ie, structural components and mechanical dimensions) is a basic prerequisite for the structural design of the pad. IPC-SM-782 is widely used two components literature : EIA-PDP-100 " registered with the standard mechanical shape of electronic components " and JEDEC95 publications ' registration and standard-form solids and related products. " It is indisputable that these files are JEDEC 95 most important publications, because it deals with the most complex components. It provides all the standard shape registration and mechanical drawings of solid components.
Publications JEDEC JESD30 ( also available for free download from the JEDEC website) package based on the characteristics of the material, the terminal position, package type, form and terminal pin number , defined abbreviations components. Characteristics, material , location, form and number identifier is optional.
Package features: a single or a plurality of letter prefix, such as pitch Claim (pitch) and profile and other features.
Packaging materials: a single- letter prefix, confirmed the main packaging materials.
Terminal location: a single- letter prefix, confirmed the position relative to the terminal package outline.
Package Type: one pair of letters, indicating the shape of the package type.
Pin the new: a single letter suffix to confirm pin form.
The number of terminals: a one, two or three numeric suffix to indicate the number of terminals.
A simple list of surface-mount package features related identifiers include:
· E expanded spacing (> 1.27 mm)
· F fine pitch (<0.5 mm); limited QFP components
· S contraction distance (<0.65 mm); all components except the QFP .
· T thin (1.0 mm body thickness )
A simple list of relevant surface mount terminal location identifiers include:
· Dual pin on opposite sides of a square or rectangular packages.
· Quad pin on the four sides of a square or rectangular package.
A simple list of surface-mount package types related identifiers include:
· CC chip carrier (chip carrier) package
· FP flat sealing (flat pack) package
· GA grid array (grid array) package
· SO small form factor (small outline) package
A simple list of relevant pin surface mount form identifiers include:
· B a direct- pin shank or spherical structure; This is a form of non-compliant pin
· F one kind of straight pin structure; This is a form of non-compliant pin
· G one kind of fin -shaped pin structure; This is a response to the pin in the form of
· J one kind of "J" shaped bent pin structure; This is a form of compliant pin
· N a non- pin structure ; This is a form of non-compliant pin
· S one kind of "S" -shaped pin structure; This is a response to the pin in the form of, for example , abbreviations F-PQFP-G208, described in 0.5, mm (F) plastic (P) Square (Q) flat pack (FP), wing -shaped pin (G), the number of terminals 208.
Characteristics of the surface and the plate member (i.e., the pad structure, the reference point, etc.) for more tolerance analysis is necessary. IPC-SM-782 explains how to perform this analysis. Many components (especially fine pitch components) is Yange Gong system unit design. Do not pad structure design imperial to metric components. Structural error generated cumulative mismatch , can not be used fine-pitch components. Remember, 0.65mm equal to 0.0256 ", 0.5mm equal to 0.0197."
In the IPC-SM-782 standards, each component with the corresponding pad structural organization of the four pages. Structured as follows:
The first page includes general information about the components, including application files, the basic structure, the number of terminals or pins, tags, carrier package format, process considerations, and welding resistance.
The second page includes elements designed to pad the size of the structure necessary for the other elements of information, refer to EIA-PDP-100 and 95 publications.
The third page includes details and dimensions corresponding pad structure. In order to produce the most suitable conditions for solder pad structure described in this page is based on the maximum material condition (MMC, maximum material condition). When using the least material condition (LMC, least material condition), size may affect the formation of solder joints.
The fourth page includes structural components and pads tolerance analysis. It also provides for the formation of solder joints should details of what to expect. Joint strength by affecting the amount of tin. Before deciding not to use the size of the pad structure is based on MMC should be tolerance analysis and evaluation of the welding point.
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